Xinyu Chen

Assistant Professor
The Hong Kong University of Science and Technology (Guangzhou)

prof_pic_xinyu.jpg

W1-L4-407, HKUST(GZ)

xinyuchen@hkust-gz.edu.cn

I am an Assistant Professor in the Microelectronics Thrust at The Hong Kong University of Science and Technology (Guangzhou). Before joining HKUST(GZ), I was a Principal Engineer at Hisilicon, working on accelerator design for next-generation DPUs. I received my Ph.D. in computer science from the National University of Singapore (NUS) in 2022, where I was supervised by Prof. Bingsheng He and collaborated closely with Prof. Weng-Fai Wong and Prof. Deming Chen.

I lead the Custom Computing Lab (CLab) at HKUST(GZ). Our group explores sustainable computing solutions for AI and big data through customized hardware architectures and specialized system designs.

Research Areas

  • AI accelerators and LLM inference
  • Heterogeneous computing with FPGA, GPU, and NPU systems
  • Hardware-software co-design for data-intensive applications
  • Algorithm, system, and architecture for embodied AI

Openings

I am actively looking for self-motivated PhD students and research assistants.

Applicants with backgrounds in computer engineering, computer science, electronic engineering, or related areas are welcome. Feel free to email me your CV and transcript if you are interested in joining us.

We currently have openings focused on VLA training, systems, and architecture for embodied robotics.

News

Mar 27, 2026 Our paper “UniCore: A Bit-Width Scalable GEMM Unit for Unified LLM Inference” has been accepted to ISCA 2026. :tada: Congratulations to Yonghao, Jiaxiang for the great work! :clap:
Dec 23, 2025 Our paper “DSTREE: Data-Driven Synchronous Traversals for Decision Forests on GPUs” has been accepted to IPDPS 2026. :tada: Congratulations to Bi and Zhenlin for the great work! :clap:
Sep 21, 2025 We received First Prize in the CCF SYS 2025 Graph Computing System Design Challenge. Congratulations to Junnan and Chenxi! :clap:
Jul 15, 2025 Our papers “AxCore: A Quantization-Aware Approximate GEMM Unit for LLM Inference” and X-SET: An Efficient Graph Pattern Matching Accelerator With Order-Aware Parallel Intersection Units” have been accepted to MICRO 2025. :tada: Congratulations to Jiaxiang, Yonghao, Chenxi and Xingyu for the great work! :clap:
Jul 01, 2025 Our paper “OA-LAMA: An Outlier-Adaptive LLM Inference Accelerator with Memory-Aligned Mixed-Precision Group Quantization” has been accepted to ICCAD 2025. :tada: Congratulations to Huangxu for the great work! :clap:
May 26, 2025 The paper “Rethinking Dynamic Networks and Heterogeneous Computing with Automatic Parallelization” has been accepted to APNet 2025. :clap:
May 08, 2025 Our paper “Graphitron: A Domain Specific Language for FPGA-Based Graph Processing Accelerator Generation” has been accepted to LCTES 2025. :tada:
Feb 26, 2025 The paper “April: Accuracy-Improved Floating-Point Approximation For Neural Network Accelerators” has been accepted to DAC 2025. :clap:
Jan 31, 2025 The paper “Clementi: Efficient Load Balancing and Communication Overlap for Multi-FPGA Graph Processing” has been accepted to SIGMOD 2025. :clap:
Aug 22, 2024 Welcome Jiashu Zhang, Chenyu Zhang, Chenxi Xu, and Xingyu Chen to join CLab! :sparkles::clap: